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this is a summary document. the complete document is available on the atmel website at www.atmel.com. 11121as?atarm?31-jan-13 description the atmel SAMA5D3 series is a high-performance, power-efficient embedded mpu based on the arm ? cortex ? -a5 processor, achieving 536 mhz with power consumption levels below 0.5 mw in low-power mode. the device features a floating point unit for high-precision computing and accelerated data processing, and a high data bandwidth architecture. it integrates advanced user interface and connectivity peripherals and security features. the SAMA5D3 series features an internal multi-layer bus architecture associated with 39 dma channels to sustain the high bandwidth required by the processor and the high-speed peripherals. the device offers support for ddr2/lpddr/lpddr2 and mlc nand flash memory with 24-bit ecc. the comprehensive peripheral set includes an lcd controller with overlays for hardware-accelerated image composition, a touchscreen interface and a cmos sensor interface. connectivity peripher als include gigabit emac with ieee1588, 10/100 emac, multiple can, uart, spi and i2c. with its secure boot mechanism, hardware accelerated engines for encryption (aes, tdes) and ha sh function (sha), the SAMA5D3 ensures anti-cloning, code protection and secure external data transfers. the SAMA5D3 series is optimized for contro l panel/hmi applications and applications that require high levels of connectivity in the industrial and consumer markets. its low- power consumption levels make the SAMA5D3 particularly suited for battery-powered devices. there are four SAMA5D3 devices in this series. the following table shows the differences in the embedded features. all other features are available on all derivatives; this includes the three usb ports as well as the encryption engine and secure boot features. at91sam arm-based embedded mpu SAMA5D3 series preliminary summary datasheet
2 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 1. features z core z arm ? cortex ? -a5 processor with arm v7-a thumb2 ? instruction set z cpu frequency up to 536 mhz z 32 kbyte data cache, 32 kbyte instruction cache, virtual memory system architecture (vmsa) z fully integrated mmu and floating point unit (vfpv4) z memories z one 160 kbyte internal rom single-cycle access at system speed, embedded boot loader: boot on nand flash, sdcard, emmc, serial dataflash ? , selectable order z one 128 kbyte internal sram, single-cycle access at system speed z high bandwidth 32-bit multi-port dynamic ram controller supporting 512 mbyte 8 bank ddr2/lpddr/lpddr2 z independent static memory controller with slc/mlc nand support with up to 24-bit error correcting code (pmecc) z system running up to 166 mhz z power-on reset cells, reset controller, shut down controller, periodic interval timer, watchdog timer and real time clock z boot mode select option, remap command z internal low-power 32 khz rc oscillator and fast 12 mhz rc oscillators z selectable 32768 hz low-power oscillator and 12 mhz oscillator z one 400 to 1000 mhz pll for the system and one pll at 480 mhz optimize d for usb high speed z 39 dma channels including two 8-channel 64-bit central dma controllers z 64-bit advanced interrupt controller z three programmable external clock signals z programmable fuse box with 256 fuse bits, 192 of them available for customer z low power management z shut down controller z battery backup registers z clock generator and power management controller z very slow clock operating mode, software programmable power optimization capabilities z peripherals z lcd tft controller with overlay, alpha-blending, rotation, scaling and color space conversion z itu-r bt. 601/656 image sensor interface z three hs/fs/ls usb ports with on-chip transceivers z one device controller z one host controller with integrated root hub (3 downstream ports) z one 10/100/1000 mbps gigabit ethernet mac controller (gmac) with ieee1588 support z one 10/100 mbps ethernet mac controller (emac) z two can controllers with 8 mailboxes, fully compliant with can 2.0 part a and 2.0 part b z softmodem interface z three high speed memory card hosts (emmc 4.3 and sd 2.0) z two master/slave serial peripheral interface z two synchronous serial controllers z three two-wire interface up to 400 kbits supporting i2c protocol and smbus z four usarts, two uarts, one dbgu z two three-channel 32-bit timer/counters
3 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 z one four-channel 16-bit pwm controller z one 12-channel 12-bit analog-to-digital converter with resistive touch-screen function z write protected registers z security z trng: true random number generator z encryption engine z aes: 256-bit, 192-bit, 128-bit key algorithm , compliant with fips pub 197 specifications z tdes: two-key or three-key algorithms, co mpliant with fips pub 46-3 specifications z sha: supports secure hash algorithm (sha1, sha224, sha 256, sha384, sha512) z atmel ? secure boot solution z i/o z five 32-bit parallel input/output controllers z 160 i/os z input change interrupt capability on each i/o line, selectable schmitt trigger input z individually programmable open-drain, pull-up and pu ll-down resistor, synchronous output, filtering z slew rate control on high speed i/os z impedance control on ddr i/os z package z 324-ball lfbga, pitch 0.8 mm table 1-1. SAMA5D3 devices SAMA5D31 SAMA5D33 SAMA5D34 SAMA5D35 lcdc xxx gmac xxx emac x x can0, can1 x x hsmci2 x x x uart0 x x uart1 x x tc1 x
4 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 2. block diagram figure 2-1. SAMA5D3 block diagram aic plla sysc pmc pllutmi pit wdt osc 32k shdc rstc por dbgu 4 gpbr ebi reduced static memory controller twi0 twi1 twi2 usart0 usart1 usart2 usart3 4-ch pwm osc12 mhz por rtc rc hs trans hs trans hs trans ddr2 lpddr2 512 mb 12-ch 12-bit adc touchscreen ssc0 ssc1 pio pio nand flash controller mcl/slc ecc (4 kb sram) hs ehci usb host cortex-a5 multi-layer matrix jtag / swd in-circuit emulator mmu biu i/d icache 32 kb dcache 32 kb sram0 64 kb lcd dma dma isi dma dma dma gmac 10/100/1000 8-ch dma0 pb pa vfp pc can0 can1 8-ch dma1 peripheral bridge trng sha aes tdes pio mci0/mci1/mci2 sd/sdio emmc hs usb device pio dma emac 10/100 uart0 uart1 ddr_d0-ddr_d31 ddr_a0-ddr_a13 ddr_cs ddr_cke ddr_ras, ddr_cas ddr_clk,ddr_clkn ddr_dqsn[3..0] ddr_dqm[3..0] ddr_we ddr_ba[2..0] a0/nbs0 ncs0,ncs1,ncs2 nwr1/nbs1 a1-a20 nwait ncs3/nandcs mci1_da[3..0] mci2_da[3..0] mci0_ck mci0_da[7..0] mci0_cda mci1_cda mci2_cda mci1_ck mci2_ck a21/nandale a22/nandcle vbg dhsdm/hhsdma hhsdmb hhsdmc hhsdpc lcd-dat0-lcd_dat23 lcd_vsync, lcd_hsync lcd_pck, lcd_disp lcd_den,lcd_pwm isi_pck isi_do-isi_d11 isi_hsync, isi_vsync gtxck-grxck gtxen-gtxer gcrs, gcol grxer-grxdv grx0-grx7 gtx0-gtx7 gmdc, gmdio erefck etxen ecrsdv, erxer erx0-erx1 etx0-etx1 emdc, emdio tdi tdo tms/swdio tck/swclk jtagsel ntrst fiq irq drxd dtxd pck0-pck2 vddbu shdn wkup xin nrst xout xin32 xout32 tst twck0-twck2 twd0-twd2 pwmh0-pwmh3 tioa0-tioa5 tiob0-tiob5 tclk0-tclk5 npcs1,npcs2,npcs3 spck mosi miso npcs0 spi0_, spi1_ tk0-tk1 tf0-tf1 td0-td1 rd0-rd1 rf0-rf1 rk0-rk1 cantx0-cantx1 canrx0-canrx1 rts0-3 sck0-3 txd0-3 rdx0-3 cts0-3 utxd0-utxd1 urdx0-urdx1 tsadtrig tsadvref gpad5-gpad11 ad0ul ad1ur ad2ll ad3lr ad4pi 12 mhz rc osc hhsdpb dhsdp/hhsdpa dibn dibp sram1 64 kb ddr_dqs[3..0] bms nandrdy pwml0-pwml3 pwmfi0-pwmfi3 a23-a25 nrd/nandoe nwe/nwr0/nandwe d0-d15 g125ck-g125cko ddr_caln ddr_calp ddr_vref smd tc0, tc1 tc2, tc3 tc4, tc5 spi0 spi1 rom 160 kb pioa pioc piob piod pioe real-time events dma dma dma dma dma dma dma dma dma
5 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 3. signal description table 3-1 gives details on the signal names classified by peripheral. table 3-1. signal description list signal name function type active level frequency (mhz) comments clocks, oscillators and plls xin main oscillator input input xout main oscillator output output xin32 slow clock oscillator input input xout32 slow clock oscillator output output vbg bias voltage reference for usb analog pck0 - pck2 programmabl e clock output output shutdown, wakeup logic shdn shut-down control output wkup wake-up input input ice and jtag tck/swclk test clock/serial wire clock input tdi test data in input tdo test data out output tms/swdio test mode select/s erial wire input/output i/o jtagsel jtag selection input reset/test nrst microcontroller reset i/o low tst test mode select input ntrst test reset signal input bms boot mode select input debug unit - dbgu drxd debug receive data input dtxd debug transmit data output advanced interrupt controller - aic irq external interrupt input input fiq fast interrupt input input pio controller - pioa - pi ob - pioc - piod - pioe pa0 - paxx parallel io controller a i/o pb0 - pbxx parallel io controller b i/o pc0 - pcxx parallel io controller c i/o pd0 - pdxx parallel io controller d i/o pe0 - pexx parallel io controller e i/o
6 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 external bus interface - ebi d0 - d15 data bus i/o a0 - a25 address bus output nwait external wait signal input low static memory controller - hsmc ncs0 - ncs3 chip select lines output low nwr0 - nwr1 write signal output low nrd read signal output low nwe write enable output low nbs0 - nbs1 byte mask signal output low nandoe nand flash output enable output low nandwe nand flash write enable output low ddr2/lpddr controller ddr_vref reference voltage input ddr_calp positive calibration reference input ddr_caln negative calibration reference input ddr_ck, ddr_ckn ddr2 differential clock output ddr_cke ddr2 clock enable output high ddr_cs ddr2 controller chip select output low ddr_ba[2..0] bank select output low ddr_we ddr2 write enable output low ddr_ras, ddr_cas row and column signal output low ddr_a[13..0] ddr2 address bus output ddr_d[31..0] ddr2 data bus i/o/-pd dqs[3..0] differential data strobe i/o- pd dqsn[3..0] dqsn must be connected to ddr_vref for ddr2 memories i/o- pd dqm[3..0] write data mask output high speed multimedia card interface - hsmci0-2 mci0_ck, mci1_ck, mci2_ck multimedia card clock i/o mci0_cda,mci1_c da, mci2_cda multimedia card command i/o mci0_da[7..0] multimedia card 0 data i/o mci1_da[3..0] multimedia card 1 data i/o mci2_da[3..0) multimedia card 2 data i/o table 3-1. signal description list (continued) signal name function type active level frequency (mhz) comments
7 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 universal synchronous asynchronous receiver transmitter- usart0-3 sckx usartx serial clock i/o txdx usartx transmit data output rxdx usartx receive data input rtsx usartx request to send output ctsx usartx clear to send input universal asynchronous receiver transmitter - uartx [1..0] utxdx uartx transmit data output urxdx uartx receive data input synchronous serial co ntroller - sscx [1..0] tdx ssc transmit data output rdx ssc receive data input tkx ssc transmit clock i/o rkx ssc receive clock i/o tfx ssc transmit frame sync i/o rfx ssc receive frame sync i/o timer/counter - tcx [5..0] tclkx tc channel x external clock input input tioax tc channel x i/o line a i/o tiobx tc channel x i/o line b i/o serial peripheral interface - spix [1..0] spix_miso master in slave out i/o spix_mosi master out slave in i/o spix_spck spi serial clock i/o spix_npcs0 spi peripheral chip select 0 i/o low spix_npcs[3..1] spi peripheral chip select output low two-wire interface -twix [2..0] twdx two-wire serial data i/o twckx two-wire serial clock i/o can controller - canx canrxx can input input cantxx can output output soft modem - smd dibn soft modem signal i/o dibp soft modem signal i/o table 3-1. signal description list (continued) signal name function type active level frequency (mhz) comments
8 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 pulse width modulation controller- pwmc pwmh[3..0] pwm waveform output high output pwml[3..0] pwm waveform output low output pwmfix pwm fault input input usb host high speed port - uhphs hhsdpa usb host port a high speed data + analog hhsdma usb host port a high speed data - analog hhsdpb usb host port b high speed data + analog hhsdmb usb host port b high speed data - analog hhsdpc usb host port c high speed data + analog hhsdmc usb host port c high speed data - analog usb device high speed port - udphs dhsdp usb device high speed data + analog dhsdm usb device high speed data - analog gigabit ethernet 10/100/1000 - gmac gtxck transmit clock or reference clock input g125ck 125 mhz input clock input g125cko 125 mhz output clock output gtxen transmit enable output gtx[7..0] transmit data output gtxer transmit coding error output grxck receive clock input grxdv receive data valid input grx[7..0] receive data input grxer receive error input gcrs carrier sense and data valid input gcol collision detect input gmdc management data clock output gmdio management data input/output i/o rmii ethernet 10/100 - emac erefck transmit clock or reference clock input etxen transmit enable output etx[1..0] transmit data output ecrsdv carrier sense/data valid input erx[1..0] receive data input erxer receive error input table 3-1. signal description list (continued) signal name function type active level frequency (mhz) comments
9 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 emdc management data clock output emdio management data input/output i/o lcd controller - lcdc lcddat[23..0] lcd data bus output lcdvsync lcd vertical synchronization output lcdhsync lcd horizontal synchronization output lcdpck lcd pixel clock output lcdden lcd data enable output lcdpwm lcdpwm for contrast control output lcddisp lcd display on/off output image sensor interface - isi isi_d[11..0] image sensor data input isi_hsync image sensor horizontal synchro input isi_vsync image sensor vertical synchro input isi_pck image sensor data clock input touch screen analog-to-digital converter - adc ad0 ul upper left touch panel analog ad1 ur upper right touch panel analog ad2 ll lower left touch panel analog ad3 lr lower right touch panel analog ad4 pi panel input analog ad5-ad11 7 analog inputs analog adtrg adc trigger input advref adc reference analog table 3-1. signal description list (continued) signal name function type active level frequency (mhz) comments
10 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 4. package and pinout the SAMA5D3 product is available in a 324-ball lfbga package. 4.1 mechanical overview of the 324-ball lfbga package figure 4-1 shows the orientation of the 324-ball bga package. figure 4-1. orientation of the 324-ball lfbga package 1 3 4 5 6 7 8 9 101112131415 1617 21 8 a b c d e f g h j k l m n p r t u v bottom view
11 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 4.2 324-ball lfbga package pinout table 4-1. SAMA5D3 pinout for 324-ball lfbga package primary alternate pio peripheral a pio peripheral b pio peripheral c reset state pin power rail i/o type signal dir signal dir signal dir signal dir signal dir signal, dir, pu, pd, hiz, st e3 vddiop0 gpio pa0 i/o lcddat0 o pio, i, pu, st f5 vddiop0 gpio pa1 i/o lcddat1 o pio, i, pu, st d2 vddiop0 gpio pa2 i/o lcddat2 o pio, i, pu, st f4 vddiop0 gpio pa3 i/o lcddat3 o pio, i, pu, st d1 vddiop0 gpio pa4 i/o lcddat4 o pio, i, pu, st j10 vddiop0 gpio pa5 i/o lcddat5 o pio, i, pu, st g4 vddiop0 gpio pa6 i/o lcddat6 o pio, i, pu, st j9 vddiop0 gpio pa7 i/o lcddat7 o pio, i, pu, st f3 vddiop0 gpio pa8 i/o lcddat8 o pio, i, pu, st j8 vddiop0 gpio pa9 i/o lcddat9 o pio, i, pu, st e2 vddiop0 gpio pa10 i/o lcddat10 o pio, i, pu, st k8 vddiop0 gpio pa11 i/o lcddat11 o pio, i, pu, st f2 vddiop0 gpio pa12 i/o lcddat12 o pio, i, pu, st g6 vddiop0 gpio pa13 i/o lcddat13 o pio, i, pu, st e1 vddiop0 gpio pa14 i/o lcddat14 o pio, i, pu, st h5 vddiop0 gpio pa15 i/o lcddat15 o pio, i, pu, st h3 vddiop0 gpio pa16 i/o lcddat16 o isi_d0 i pio, i, pu, st h6 vddiop0 gpio pa17 i/o lcddat17 o isi_d1 i pio, i, pu, st h4 vddiop0 gpio pa18 i/o lcddat18 o twd2 i/o isi_d2 i pio, i, pu, st h7 vddiop0 gpio pa19 i/o lcddat19 o twck2 o isi_d3 i pio, i, pu, st h2 vddiop0 gpio pa20 i/o lcddat20 o pwmh0 o isi_d4 i pio, i, pu, st j6 vddiop0 gpio pa21 i/o lcddat21 o pwml0 o isi_d5 i pio, i, pu, st g2 vddiop0 gpio pa22 i/o lcddat22 o pwmh1 o isi_d6 i pio, i, pu, st j5 vddiop0 gpio pa23 i/o lcddat23 o pwml1 o isi_d7 i pio, i, pu, st f1 vddiop0 gpio pa24 i/o lcdpwm o pio, i, pu, st j4 vddiop0 gpio pa25 i/o lcddisp o pio, i, pu, st g3 vddiop0 gpio pa26 i/o lcdvsync o pio, i, pu, st j3 vddiop0 gpio pa27 i/o lcdhsync o pio, i, pu, st g1 vddiop0 gpio_clk2 pa28 i/o lcdpck o pio, i, pu, st k4 vddiop0 gpio pa29 i/o lcdden o pio, i, pu, st h1 vddiop0 gpio pa30 i/o twd0 i/o urxd1 i isi_vsync i pio, i, pu, st k3 vddiop0 gpio pa31 i/o twck0 o utxd1 o isi_hsync i pio, i, pu, st t2 vddiop1 gmac pb0 i/o gtx0 o pwmh0 o pio, i, pu, st n7 vddiop1 gmac pb1 i/o gtx1 o pwml0 o pio, i, pu, st t3 vddiop1 gmac pb2 i/o gtx2 o tk1 i/o pio, i, pu, st n6 vddiop1 gmac pb3 i/o gtx3 o tf1 i/o pio, i, pu, st p5 vddiop1 gmac pb4 i/o grx0 i pwmh1 o pio, i, pu, st t4 vddiop1 gmac pb5 i/o grx1 i pwml1 o pio, i, pu, st r4 vddiop1 gmac pb6 i/o grx2 i td1 o pio, i, pu, st u1 vddiop1 gmac pb7 i/o grx3 i rk1 i pio, i, pu, st r5 vddiop1 gmac pb8 i/o gtxck i pwmh2 o pio, i, pu, st p3 vddiop1 gmac pb9 i/o gtxen o pwml2 o pio, i, pu, st
12 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 r6 vddiop1 gmac pb10 i/o gtxer o rf1 i/o pio, i, pu, st v3 vddiop1 gmac pb11 i/o grxck i rd1 i pio, i, pu, st p6 vddiop1 gmac pb12 i/o grxdv i pwmh3 o pio, i, pu, st v1 vddiop1 gmac pb13 i/o grxer i pwml3 o pio, i, pu, st r7 vddiop1 gmac pb14 i/o gcrs i canrx1 i pio, i, pu, st u3 vddiop1 gmac pb15 i/o gcol i cantx1 o pio, i, pu, st p7 vddiop1 gmac pb16 i/o gmdc o pio, i, pu, st v2 vddiop1 gmac pb17 i/o gmdio i/o pio, i, pu, st v5 vddiop1 gmac pb18 i/o g125ck i pio, i, pu, st t6 vddiop1 gmac pb19 i/o mci1_cda i/o gtx4 o pio, i, pu, st n8 vddiop1 gmac pb20 i/o mci1_da0 i/o gtx5 o pio, i, pu, st u4 vddiop1 gmac pb21 i/o mci1_da1 i/o gtx6 o pio, i, pu, st m7 vddiop1 gmac pb22 i/o mci1_da2 i/o gtx7 o pio, i, pu, st u5 vddiop1 gmac pb23 i/o mci1_da3 i/o grx4 i pio, i, pu, st m8 vddiop1 gmac pb24 i/o mci1_ck i/o grx5 i pio, i, pu, st t5 vddiop1 gmac pb25 i/o sck1 i/o grx6 i pio, i, pu, st n9 vddiop1 gmac pb26 i/o cts1 i grx7 i pio, i, pu, st v4 vddiop1 gpio pb27 i/o rts1 o g125cko o pio, i, pu, st m9 vddiop1 gpio pb28 i/o rxd1 i pio, i, pu, st p8 vddiop1 gpio pb29 i/o txd1 o pio, i, pu, st m10 vddiop0 gpio pb30 i/o drxd i pio, i, pu, st r9 vddiop0 gpio pb31 i/o dtxd o pio, i, pu, st d8 vddiop0 gpio pc0 i/o etx0 o tioa3 i/o pio, i, pu, st a4 vddiop0 gpio pc1 i/o etx1 o tiob3 i/o pio, i, pu, st e8 vddiop0 gpio pc2 i/o erx0 i tclk3 i pio, i, pu, st a3 vddiop0 gpio pc3 i/o erx1 i tioa4 i/o pio, i, pu, st a2 vddiop0 gpio pc4 i/o etxen o tiob4 i/o pio, i, pu, st f8 vddiop0 gpio pc5 i/o ecrsdv i tclk4 i pio, i, pu, st b3 vddiop0 gpio pc6 i/o erxer i tioa5 i/o pio, i, pu, st g8 vddiop0 gpio pc7 i/o erefck i tiob5 i/o pio, i, pu, st b4 vddiop0 gpio pc8 i/o emdc o tclk5 i pio, i, pu, st f7 vddiop0 gpio pc9 i/o emdio i/o pio, i, pu, st a1 vddiop0 gpio pc10 i/o mci2_cda i/o lcddat20 o pio, i, pu, st d7 vddiop0 gpio pc11 i/o mci2_da0 i/o lcddat19 o pio, i, pu, st c6 vddiop0 gpio pc12 i/o mci2_da1 i/o tioa1 i/o lcddat18 o pio, i, pu, st e7 vddiop0 gpio pc13 i/o mci2_da2 i/o tiob1 i/o lcddat17 o pio, i, pu, st b2 vddiop0 gpio pc14 i/o mci2_da3 i/o tclk1 i lcddat16 o pio, i, pu, st f6 vddiop0 mci_clk pc15 i/o mci2_ck i/o pck2 o lcddat21 o pio, i, pu, st b1 vddiop0 gpio pc16 i/o tk0 i/o pio, i, pu, st e6 vddiop0 gpio pc17 i/o tf0 i/o pio, i, pu, st c3 vddiop0 gpio pc18 i/o td0 o pio, i, pu, st d6 vddiop0 gpio pc19 i/o rk0 i/o pio, i, pu, st c4 vddiop0 gpio pc20 i/o rf0 i/o pio, i, pu, st d5 vddiop0 gpio pc21 i/o rd0 i pio, i, pu, st table 4-1. SAMA5D3 pinout for 324-ball lfbga package (continued) primary alternate pio peripheral a pio peripheral b pio peripheral c reset state pin power rail i/o type signal dir signal dir signal dir signal dir signal dir signal, dir, pu, pd, hiz, st
13 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 c2 vddiop0 gpio pc22 i/o spi1_miso i/o pio, i, pu, st g9 vddiop0 gpio pc23 i/o spi1_mosi i/o pio, i, pu, st c1 vddiop0 gpio_clk pc24 i/o spi1_spck i/o pio, i, pu, st h10 vddiop0 gpio pc25 i/o spi1_npcs0 i/o pio, i, pu, st h9 vddiop0 gpio pc26 i/o spi1_npcs1 o twd1 i/o isi_d11 i pio, i, pu, st d4 vddiop0 gpio pc27 i/o spi1_npcs2 o twck1 o isi_d10 i pio, i, pu, st h8 vddiop0 gpio pc28 i/o spi1_npcs3 o pwmfi0 i isi_d9 i pio, i, pu, st g5 vddiop0 gpio pc29 i/o urxd0 i pwmfi2 i isi_d8 i pio, i, pu, st d3 vddiop0 gpio pc30 i/o utxd0 o isi_pck o pio, i, pu, st e4 vddiop0 gpio pc31 i/o fiq i pwmfi1 i pio, i, pu, st k5 vddiop1 gpio pd0 i/o mci0_cda i/o pio, i, pu, st p1 vddiop1 gpio pd1 i/o mci0_da0 i/o pio, i, pu, st k6 vddiop1 gpio pd2 i/o mci0_da1 i/o pio, i, pu, st r1 vddiop1 gpio pd3 i/o mci0_da2 i/o pio, i, pu, st l7 vddiop1 gpio pd4 i/o mci0_da3 i/o pio, i, pu, st p2 vddiop1 gpio pd5 i/o mci0_da4 i/o tioa0 i/o pwmh2 o pio, i, pu, st l8 vddiop1 gpio pd6 i/o mci0_da5 i/o tiob0 i/o pwml2 o pio, i, pu, st r2 vddiop1 gpio pd7 i/o mci0_da6 i/o tclk0 i pwmh3 o pio, i, pu, st k7 vddiop1 gpio pd8 i/o mci0_da7 i/o pwml3 o pio, i, pu, st u2 vddiop1 mci_clk pd9 i/o mci0_ck i/o pio, i, pu, st k9 vddiop1 gpio pd10 i/o spi0_miso i/o pio, i, pu, st m5 vddiop1 gpio pd11 i/o spi0_mosi i/o pio, i, pu, st k10 vddiop1 gpio_clk pd12 i/o spi0_spck i/o pio, i, pu, st n4 vddiop1 gpio pd13 i/o spi0_npcs0 i/o pio, i, pu, st l9 vddiop1 gpio pd14 i/o sck0 i/o spi0_npcs1 o canrx0 i pio, i, pu, st n3 vddiop1 gpio pd15 i/o cts0 i spi0_npcs2 o cantx0 o pio, i, pu, st l10 vddiop1 gpio pd16 i/o rts0 o spi0_npcs3 o pwmfi3 i pio, i, pu, st n5 vddiop1 gpio pd17 i/o rxd0 i pio, i, pu, st m6 vddiop1 gpio pd18 i/o txd0 o pio, i, pu, st t1 vddiop1 gpio pd19 i/o adtrg i pio, i, pu, st n2 vddana gpio_ana pd20 i/o ad0 i pio, i, pu, st m3 vddana gpio_ana pd21 i/o ad1 i pio, i, pu, st m2 vddana gpio_ana pd22 i/o ad2 i pio, i, pu, st l3 vddana gpio_ana pd23 i/o ad3 i pio, i, pu, st m1 vddana gpio_ana pd24 i/o ad4 i pio, i, pu, st n1 vddana gpio_ana pd25 i/o ad5 i pio, i, pu, st l1 vddana gpio_ana pd26 i/o ad6 i pio, i, pu, st l2 vddana gpio_ana pd27 i/o ad7 i pio, i, pu, st k1 vddana gpio_ana pd28 i/o ad8 i pio, i, pu, st k2 vddana gpio_ana pd29 i/o ad9 i pio, i, pu, st j1 vddana gpio_ana pd30 i/o ad10 i pck0 o pio, i, pu, st j2 vddana gpio_ana pd31 i/o ad11 i pck1 o pio, i, pu, st p13 vddiom ebi pe0 i/o a0/nbs0 o a,i, pd, st r14 vddiom ebi pe1 i/o a1 o a,i, pd, st table 4-1. SAMA5D3 pinout for 324-ball lfbga package (continued) primary alternate pio peripheral a pio peripheral b pio peripheral c reset state pin power rail i/o type signal dir signal dir signal dir signal dir signal dir signal, dir, pu, pd, hiz, st
14 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 r13 vddiom ebi pe2 i/o a2 o a,i, pd, st v18 vddiom ebi pe3 i/o a3 o a,i, pd, st p14 vddiom ebi pe4 i/o a4 o a,i, pd, st u18 vddiom ebi pe5 i/o a5 o a,i, pd, st t18 vddiom ebi pe6 i/o a6 o a,i, pd, st r15 vddiom ebi pe7 i/o a7 o a,i, pd, st p17 vddiom ebi pe8 i/o a8 o a,i, pd, st p15 vddiom ebi pe9 i/o a9 o a,i, pd, st p18 vddiom ebi pe10 i/o a10 o a,i, pd, st r16 vddiom ebi pe11 i/o a11 o a,i, pd, st n16 vddiom ebi pe12 i/o a12 o a,i, pd, st r17 vddiom ebi pe13 i/o a13 o a,i, pd, st n17 vddiom ebi pe14 i/o a14 o a,i, pd, st r18 vddiom ebi pe15 i/o a15 o sck3 i/o a,i, pd, st n18 vddiom ebi pe16 i/o a16 o cts3 i a,i, pd, st p16 vddiom ebi pe17 i/o a17 o rts3 o a,i, pd, st m18 vddiom ebi pe18 i/o a18 o rxd3 i a,i, pd, st n15 vddiom ebi pe19 i/o a19 o txd3 o a,i, pd, st m15 vddiom ebi pe20 i/o a20 o sck2 i/o a,i, pd, st n14 vddiom ebi pe21 i/o a21/nandale o a,i, pd, st m17 vddiom ebi pe22 i/o a22/nandcle o a,i, pd, st m13 vddiom ebi pe23 i/o a23 o cts2 i a,i, pd, st m16 vddiom ebi pe24 i/o a24 o rts2 o a,i, pd, st n12 vddiom ebi pe25 i/o a25 o rxd2 i a,i, pd, st m14 vddiom ebi pe26 i/o ncs0 o txd2 o a,i, pd, st m12 vddiom ebi pe27 i/o ncs1 o tioa2 i/o lcddat22 o pio,i, pd, st l13 vddiom ebi pe28 i/o ncs2 o tiob2 i/o lcddat23 o pio, i, pd, st l15 vddiom ebi pe29 i/o nwr1/nbs1 o tclk2 i pio, i, pd, st l14 vddiom ebi pe30 i/o nwait i pio, i, pd, st l16 vddiom ebi pe31 i/o irq i pwml1 o pio,i, pd, st u15 vddbu sysc tst i i, pd, u9 vddiop0 sysc bms i i u8 vddiop0 clock xin i i v8 vddiop0 clock xout o o u16 vddbu clock xin32 i i v16 vddbu clock xout32 o o t12 vddbu sysc shdn o o, pu t10 vddbu sysc wkup i i, st v9 vddiop0 rstjtag nrst i/o i, pu, st p11 vddiop0 rstjtag ntrst i i, pu, st r8 vddiop0 rstjtag tdi i i, st m11 vddiop0 rstjtag tdo o o n10 vddiop0 rstjtag tms i swdio i/o i, st p9 vddiop0 rstjtag tck i swclk i i, st table 4-1. SAMA5D3 pinout for 324-ball lfbga package (continued) primary alternate pio peripheral a pio peripheral b pio peripheral c reset state pin power rail i/o type signal dir signal dir signal dir signal dir signal dir signal, dir, pu, pd, hiz, st
15 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 t9 vddbu sysc jtagsel i i, pd v6 vddiop0 dib dibp o o, pu u6 vddiop0 dib dibn o o, pu k12 vddiom ebi d0 i/o i, pd k15 vddiom ebi d1 i/o i, pd k14 vddiom ebi d2 i/o i, pd k16 vddiom ebi d3 i/o i, pd k13 vddiom ebi d4 i/o i, pd k17 vddiom ebi d5 i/o i, pd j12 vddiom ebi d6 i/o i, pd k18 vddiom ebi d7 i/o i, pd j14 vddiom ebi d8 i/o i, pd j16 vddiom ebi d9 i/o i, pd j13 vddiom ebi d10 i/o i, pd j17 vddiom ebi d11 i/o i, pd j15 vddiom ebi d12 i/o i, pd j18 vddiom ebi d13 i/o i, pd h16 vddiom ebi d14 i/o i, pd h18 vddiom ebi d15 i/o i, pd l12 vddiom ebi ncs3/nandcs o o, pu l18 vddiom ebi nandrdy i i, pu l17 vddiom ebi nrd/nandoe o o, pu k11 vddiom ebi nwe/nandwe o o, pu c13 vddioddr ddr_vref i i b10 vddioddr ddr_io ddr_a0 o o c11 vddioddr ddr_io ddr_a1 o o a9 vddioddr ddr_io ddr_a2 o o d11 vddioddr ddr_io ddr_a3 o o b9 vddioddr ddr_io ddr_a4 o o e10 vddioddr ddr_io ddr_a5 o o d10 vddioddr ddr_io ddr_a6 o o a8 vddioddr ddr_io ddr_a7 o o c10 vddioddr ddr_io ddr_a8 o o b8 vddioddr ddr_io ddr_a9 o o f11 vddioddr ddr_io ddr_a10 o o a7 vddioddr ddr_io ddr_a11 o o d9 vddioddr ddr_io ddr_a12 o o a6 vddioddr ddr_io ddr_a13 o o h12 vddioddr ddr_io ddr_d0 i/o hiz h17 vddioddr ddr_io ddr_d1 i/o hiz h13 vddioddr ddr_io ddr_d2 i/o hiz g17 vddioddr ddr_io ddr_d3 i/o hiz g16 vddioddr ddr_io ddr_d4 i/o hiz h15 vddioddr ddr_io ddr_d5 i/o hiz table 4-1. SAMA5D3 pinout for 324-ball lfbga package (continued) primary alternate pio peripheral a pio peripheral b pio peripheral c reset state pin power rail i/o type signal dir signal dir signal dir signal dir signal dir signal, dir, pu, pd, hiz, st
16 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 f17 vddioddr ddr_io ddr_d6 i/o hiz g15 vddioddr ddr_io ddr_d7 i/o hiz f16 vddioddr ddr_io ddr_d8 i/o hiz e17 vddioddr ddr_io ddr_d9 i/o hiz g14 vddioddr ddr_io ddr_d10 i/o hiz e16 vddioddr ddr_io ddr_d11 i/o hiz d17 vddioddr ddr_io ddr_d12 i/o hiz c18 vddioddr ddr_io ddr_d13 i/o hiz d16 vddioddr ddr_io ddr_d14 i/o hiz c17 vddioddr ddr_io ddr_d15 i/o hiz b16 vddioddr ddr_io ddr_d16 i/o hiz b18 vddioddr ddr_io ddr_d17 i/o hiz c15 vddioddr ddr_io ddr_d18 i/o hiz a18 vddioddr ddr_io ddr_d19 i/o hiz c16 vddioddr ddr_io ddr_d20 i/o hiz c14 vddioddr ddr_io ddr_d21 i/o hiz d15 vddioddr ddr_io ddr_d22 i/o hiz b14 vddioddr ddr_io ddr_d23 i/o hiz a15 vddioddr ddr_io ddr_d24 i/o hiz a14 vddioddr ddr_io ddr_d25 i/o hiz e12 vddioddr ddr_io ddr_d26 i/o hiz a11 vddioddr ddr_io ddr_d27 i/o hiz b11 vddioddr ddr_io ddr_d28 i/o hiz f12 vddioddr ddr_io ddr_d29 i/o hiz a10 vddioddr ddr_io ddr_d30 i/o hiz e11 vddioddr ddr_io ddr_d31 i/o hiz g12 vddioddr ddr_io ddr_dqm0 o o e15 vddioddr ddr_io ddr_dqm1 o o b15 vddioddr ddr_io ddr_dqm2 o o d12 vddioddr ddr_io ddr_dqm3 o o e18 vddioddr ddr_io ddr_dqs0 i/o i, pd g18 vddioddr ddr_io ddr_dqs1 i/o i, pd b17 vddioddr ddr_io ddr_dqs2 i/o i, pd b13 vddioddr ddr_io ddr_dqs3 i/o i, pd d18 vddioddr ddr_io ddr_dqsn0 i/o i, pu f18 vddioddr ddr_io ddr_dqsn1 i/o i, pu a17 vddioddr ddr_io ddr_dqsn2 i/o i, pu a13 vddioddr ddr_io ddr_dqsn3 i/o i, pu c8 vddioddr ddr_io ddr_cs o o b12 vddioddr ddr_io ddr_clk o o a12 vddioddr ddr_io ddr_clkn o o b7 vddioddr ddr_io ddr_cke o o c12 vddioddr ddr_io ddr_caln i o e13 vddioddr ddr_io ddr_calp i o table 4-1. SAMA5D3 pinout for 324-ball lfbga package (continued) primary alternate pio peripheral a pio peripheral b pio peripheral c reset state pin power rail i/o type signal dir signal dir signal dir signal dir signal dir signal, dir, pu, pd, hiz, st
17 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 g11 vddioddr ddr_io ddr_ras o o a5 vddioddr ddr_io ddr_cas o o b5 vddioddr ddr_io ddr_we o o e9 vddioddr ddr_io ddr_ba0 o o b6 vddioddr ddr_io ddr_ba1 o o f9 vddioddr ddr_io ddr_ba2 o o r11 vbg vbg vbg i i u14 vddutmii usbhs hhsdpc i/o o, pd v14 vddutmii usbhs hhsdmc i/o o, pd u12 vddutmii usbhs hhsdpb i/o o, pd v12 vddutmii usbhs hhsdmb i/o o, pd u10 vddutmii usbhs hhsdpa i/o dhsdp o, pd v10 vddutmii usbhs hhsdma i/o dhsdm o, pd v15 vddbu power supply vddbu i i t13 gndbu ground gndbu i i c5, c7, d14, t15, t7, u17, v7 vddcore power supply vddcore i i a16, c9, n13, t14, t8, v17 gndcore ground gndcore i i d13, f14, g10, g13, h11 vddioddr power supply vddioddr i i e14, f10, f13, f15, h14 gndioddr ground gndioddr i i p12, t16 vddiom power supply vddiom i i j11, t17 gndiom ground gndiom i i g7, v11 vddiop0 power supply vddiop0 i i l11, m4 vddiop1 power supply vddiop1 i i e5, j7, n11, u7 gndiop ground gndiop i i v13 vddutmic power supply vddutmic i i u13 vddutmii power supply vddutmii i i r12 gndutmi ground gndutmi i i r10 vddplla power supply vddplla i i p10 gndpll ground gndpll i i u11 vddosc power supply vddosc i i t11 gndosc ground gndosc i i table 4-1. SAMA5D3 pinout for 324-ball lfbga package (continued) primary alternate pio peripheral a pio peripheral b pio peripheral c reset state pin power rail i/o type signal dir signal dir signal dir signal dir signal dir signal, dir, pu, pd, hiz, st
18 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 l6 vddana power supply vddana i i l4 gndana ground gndana i i l5 vddana power supply advref i i r3 vddfuse power supply vddfuse i i p4 gndfuse ground gndfuse i i table 4-1. SAMA5D3 pinout for 324-ball lfbga package (continued) primary alternate pio peripheral a pio peripheral b pio peripheral c reset state pin power rail i/o type signal dir signal dir signal dir signal dir signal dir signal, dir, pu, pd, hiz, st
19 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 5. mechanical characteristics figure 5-1. 324-ball lfbga package drawing 3 2 4 title low profile fine pitch ball grid array table 5-1. 324-ball lfbga package characteristics moisture sensitivity level 3 table 5-2. device and 324-ball lfbga package maximum weight 400 mg table 5-3. package reference jedec drawing reference mo-275-kaae-1 jesd97 classification e8 table 5-4. package information ball land 0.350 mm 0.05 solder mask opening 0.275 mm 0.05 solder mask definition smd
20 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 6. SAMA5D3 ordering information table 6-1. SAMA5D3 ordering information ordering code package package type temperature operating range atSAMA5D31a-cu bga324 green industrial -40c to 85c atSAMA5D33a-cu bga324 green industrial -40c to 85c atSAMA5D34a-cu bga324 green industrial -40c to 85c atSAMA5D35a-cu bga324 green industrial -40c to 85c
21 SAMA5D3 series [summary datasheet] 11121as?atarm?31-jan-13 revision history in the table that follows, the most recent version of the document appears first. ?rfo? indicates changes requested during the document review and approval loop. table 6-2. doc. rev comments change request ref. 11121as first issue
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